The 8T49N242 has one fractional-feedback PLL that can be used as a frequency translator with jitter attenuation or a frequency synthesizer. It is equipped with four integer output dividers, allowing the generation of up to four different output frequencies, ranging from 8 kHz to 1 GHz. Output frequencies can be completely independent of the input frequencies. The four outputs may select among LVPECL, LVDS, HCSL or LVCMOS output levels.

The 8T49N242 is ideal for use in a wide range of equipment, including 10G/40G/100G SONET/SDH and Ethernet network line cards, wireless base station baseband units, broadcast video. carrier Ethernet switches, OTN, or in test and measurement applications. For example, the 8T49N242 can be used in GbE/10GbE/100GbE Synchronous Ethernet line card applications in order to preserve the G.8262 compliance from the Synchronous Equipment Timing Source (SETS) on the timing card.

IDT’s third generation Universal Frequency Translator family also includes the 8T49N241 (2-in / 1-PLL / 4-out), the 8T49N285 (2-in / 1-PLL / 8-out), the 8T49N286 (4-in / 2-PLL / 8-out) and the 8T49N287 (2-in / 2-PLL / 8-out). These devices are complemented by the 82P33714 and 82P33731 synchronous equipment timing source (SETS) for Synchronous Ethernet (SyncE) and 10G-40G SyncE, respectively.

To see other devices in this product family, visit the Universal Frequency Translators page.


• Compliant with the requirements outlined in Telcordia GR-253-CORE (SONET) & ITU-T G.813/G.8262 (SDH/SONET & SyncE) when paired with a Synchronous Equipment Timing Source (SETS ) device
• Generates up to 4 LVPECL / LVDS/HCSL or 16 LVCMOS output clocks ranging from 8 kHz up to 1.0 GHz (diff), 8 kHz to 250 MHz (LVCMOS), that meet jitter limits for 10G up to 25G Ethernet applications
• 0.276ps RMS (including spurs), 12 kHz to 20 MHz
• Accepts up to two LVPECL, LVDS, LVHSTL, HCSL or LVCMOS input clocks ranging from 8 kHz up to 875 MHz
• Auto and manual input clock selection with hitless switching
• Clock input monitoring, including support for gapped clocks
• Phase-Slope Limiting and Fully Hitless Switching options to control output phase transients
• Operates from a 10 MHz to 50 MHz
• Register programmable through I2C or via external I2C EEPROM
• 8T49N242-998 “Boot from EEPROM”
• 8T49N242-999 “powers up disabled”
• Supported by IDT Timing Commander Software


Title language Type Format File Size Date
star 8T49N242 Datasheet Datasheet PDF 1.49 MB
8T49N242-006 Datasheet Addendum Datasheet - Short-form PDF 129 KB
Timing Commander Installation Guide Guide PDF 497 KB
FemtoNG Universal Frequency Translator Ordering Product Information Guide Manual - Hardware PDF 270 KB
star 8T49N24x Evaluation Board User Guide Manual - Hardware PDF 1.41 MB
IDT Products for Wired Broadband Applications Application Brief PDF 686 KB
App Note 932 - Description for Startup and Calibration for UFT3G Family Application Note PDF 604 KB
8T49N24x EEPROM Programming Guide Application Note PDF 593 KB
8T49N24x Power-Up Configuration Guide Application Note PDF 175 KB
AN-828 Termination - LVPECL Application Note PDF 322 KB
8T49N24x Frequency Programming Guide Application Note PDF 198 KB
AN-893 8T49N241_2 Frequency Synchronization Compliance Report Application Note PDF 1.11 MB
AN-831 The Crystal Load curve Application Note PDF 395 KB
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 170 KB
AN-845 Termination - LVCMOS Application Note PDF 146 KB
AN-846 Termination - LVDS Application Note PDF 133 KB
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 495 KB
AN-840 Jitter Specifications for Timing Signals Application Note PDF 442 KB
AN-838 Peak-to-Peak Jitter Calculations Application Note PDF 115 KB
AN-839 RMS Phase Jitter Application Note PDF 233 KB
AN-832 Timing Budget and Accuracy Application Note PDF 131 KB
AN-833 Differential Input Self Oscillation Prevention Application Note PDF 180 KB
AN-834 Hot-Swap Recommendations Application Note PDF 153 KB
AN-835 Differential Input with VCMR being VIH Referenced Application Note PDF 160 KB
AN-836 Differential Input to Accept Single-ended Levels Application Note PDF 120 KB
AN-830 Quartz Crystal Drive Level Application Note PDF 143 KB
AN-815 Understanding Jitter Units Application Note PDF 565 KB
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.15 MB
AN-802 Crystal-Measuring Oscillator Negative Resistance Application Note PDF 136 KB
AN-801 Crystal-High Drive Level Application Note PDF 202 KB
AN-805 Recommended Ferrite Beads Application Note PDF 121 KB
AN-806 Power Supply Noise Rejection Application Note PDF 438 KB
AN-803 Crystal Timing Budget and Accuracy for Renesas Timing Clock Products Application Note PDF 108 KB
PCN# : A1904-01 Add Greatek, Taiwan as an Alternate Assembly Facility Product Change Notice PDF 983 KB
PCN#: TP1901-01 Datasheet Correction for I2C Read Sequence Diagrams for the UFT Product Family Product Change Notice PDF 454 KB
PCN# : N1807-01 Die revisionc change, 8T49N240, 8T49N242 Product Change Notice PDF 21 KB
PCN# : A1611-02 Add JCET China as Alternate Assembly and Change of Material Set at Alternate Assembly Location Product Change Notice PDF 583 KB
PCN# : N1609-01 Minor Design Change on Select Devices Product Change Notice PDF 227 KB
PCN# : W1512-01 Wafer Size change from 200mm to 300mm at Global Foundries Product Change Notice PDF 188 KB
8T49N24x Example Timing Commander Configuration and Phase Noise Plots Other ZIP 1.04 MB
IDT Clock Generation Overview Overview PDF 1.83 MB
IDT Jitter Attenuator Product Overview Overview PDF 1.95 MB
82P33714/31 SETS and 8T49N24x Universal Frequency Translators Product Brief Product Brief PDF 370 KB
8T49N241/8T49N242 Universal Frequency Translators Product Brief 日本語 Product Brief PDF 571 KB
8T49N24x Schematics Review Checklist Schematic XLSX 550 KB
8T49N24x EVB Schematic Schematic PDF 74 KB
IDT Clocks for Xilinx Ultrascale FPGAs Technical Brief PDF 256 KB
IDT Clocks for Altera's Stratix V and Arria V/X FPGAs Technical Brief PDF 238 KB
IDT Clocks for SMPTE and Xilinx® 7 Series FPGAs Technical Brief PDF 566 KB


Title language Type Format File Size Date
Timing Commander Installer (v1.17) Software & Tools - Other ZIP 18.02 MB
8T49N24x Timing Commander Personality File (v1.7.3) Software & Tools - Software ZIP 6.71 MB
8T49N242 IBIS Model Model - IBIS ZIP 331 KB
8T49N24x Design Files (Schematic Symbol and PCB Footprint) PCB Design Files ZIP 12 KB

memoryBoards & Kits

Part Number Title Type Company
8T49N242-EVK Evaluation Kit for 8T49N242 Evaluation Renesas