Renesas jitter attenuators make use of a low-jitter external reference and control circuitry to remove unwanted noise from one or more input clock signals. Different members of this category of products make use of VCXOs or simple crystals as this reference. Innovative techniques allow the use of fixed-frequency crystals rather than hard-to-find pullable crystal devices. In addition, the jitter attenuator products also include a frequency translation stage that allows the output frequency or frequencies to be different than the input frequency. This input-output frequency may be an integer or non-integer ratio depending on the device selected. Several devices within the family will allow multiple such ratios to be supported, resulting in multiple independent frequencies or even non-integer relationships between output frequencies.
The integration of a jitter attenuator and frequency translator simplifies the circuit and minimizes the bill-of-materials (BOM). Renesas' rich portfolio of jitter attenuators and frequency translators come in varying levels of performance, power, and programmability to address the needs of virtually any application. Renesas jitter attenuators support various single-ended and differential signalling levels such as LVCMOS, LVPECL, LVDS, HCSL, HSTL, or SSTL.
Customers looking for application-specific signal repeaters and retimers for PCIe, SAS/SATA, USB 3.0, and XAUI applications, please click here.
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About Jitter Attenuators (Jitter Cleaners)
A jitter attenuator (aka jitter cleaner) is used to reduce the magnitude of jitter on a given timing signal. Jitter can be defined as the undesired deviation from an ideal periodic timing signal, and may be observed in characteristics such as the frequency, phase, or amplitude of successive pulses. High levels of jitter can arise as a result of long traces, cables, and noisy system environments, producing undesired system behavior in high-performance applications. The Renesas jitter attenuators (jitter cleaners) use stable reference sources and innovative control circuitry to lock on to a noisy clock signal and then output a high-quality signal to be sourced to other devices within the clock network.